Qiapter 2 described the characteristic and performance of the high speed digital signal processor, analyzed and researched three kinds of parallel processing system structure based on DSP.
第2章论述了高速数字信号处理器的特点和性能，对基于DSP的三种并行处理体系结构进行了分析研究。
This paper introduces a method to implement the algorithm of digital multi beam forming in high performance DSP SHARC processor, and the parallel processing is discussed.
文中介绍了一种采用高性能DSP处理器SHARC实现实时数字多波束形成的处理方案，着重于其中的并行处理。
This design is implemented in the FT64 stream processor. By using it, multiple FT64 processors can transfer data through a high-performance network and perform parallel stream computing.
该设计应用于FT64流处理器上，使得多个流处理器能够通过高性能网络进行数据传输，以便进行并行流数据运算。
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